As your wireless multi-protocol silicon systems provider, Systemonic
will ensure that you achieve new levels of technology, resulting
in new levels of success. That's your commitment from Systemonic.
Systemonic's core technology is the patented OnDSP platform.
This platform supports the generation of application-specific digital
signal processors (DSPs) within a very short time. These DSPs feature
a single-instruction-multiple-data (SIMD) architecture in which
the parallel data flows are split up into several identical datapaths.
The platform is based on a specific processor architecture the major
parts of which remain constant with every generation; other parts,
however, are automatically generated as required by the specific
For an optimum matching of the DSP to the performance requirements
of the application concerned, the processor architecture can be
modified at different levels of the DSP architecture.
In the execution of the signal processing algorithms, the width
of the datapath plays a significant role in determining performance.
The OnDSP platform permits a simple variation of the bit
widths within the datapath elements so that the required accuracy
can be achieved with a minimum width and, thus, size.
The computation of algorithms requires a certain number of arithmetic
steps to be performed. Particularly in the case of signal processing
algorithms such as filters or Fast Fourier Transformations (FFT),
large amounts of data are processed within loops. Parallel processing
can accelerate the computation of such algorithms. The OnDSP
platform allows for different numbers, depending of parallel datapaths,
allowing an optimum compromise to be achieved between the required
clock frequency and the size of the circuit.
Different applications call for different datapath operations.
An integral part of the OnDSP platform is a library of blocks
that perform a variety of commonly-used operations such as Galois
Field Arithmetics, Multiply-Accumulate (MAC), Shifter, error correction
and error protection encoding. With the help of this library,
the datapath of the signal processor can be tailored to each application's
specific needs during the development phase. This approach guarantees
that the DSP performs only those operations and instructions which
are needed. As a result, the area occupied by the circuit is substantially
smaller than that of standard DSPs.
By means of the parameters established during the system and processor
specification phase, the platform automatically generates a synthezisable
HDL description that can be embedded in the system-on-chip design.
The development environment required for programming the DSP is
generated from the same data-base.
The advantages of this platform approach are numerous. The optimum
adjustment of the DSP to the specific application allows a chip
to be designed that combines the advantages of a programmable solution
with the efficiency of a hard-wired circuit. The largely automatic
generation both of the HDL description of the DSP and the associated
software development tools permits a drastic reduction in design
time and a largely parallel chip design and associated firmware